IDLP on Cryogenic CMOS design techniques for scaled quantum computing systems

On 15th October,  we organized the Industrial Distinguished Lecturer Program through online mode. It started with the Welcome Address and Introduction of the Resource Person by the student Members Ms.Vivitha and Mr.Ramakrishnan, IEEE Circuits and Systems Society, Sri Sairam Engineering College. Next, the session was taken over by Prof. Sudipto. 40 participants attended this iDLP. The title is Cryogenic CMOS design techniques for scaled quantum computing systems.