Distinguished Lecturers Program

Distinguished Lecturer Program” organized by IEEE Solid-State Circuits Society (SSCS) Kerala Chapter and IEEE SSCS SBC AJCE (Amal Jyothi College of Engineering). The lecture is titled “FPGA-Chiplet Architectures and Circuits for 2.5D/3D 6G Intelligent Radios” and is scheduled for October 9, 2024, at 8:00 PM IST via Google Meet.

“FPGA-Chiplet Architectures and Circuits for 2.5D/3D 6G Intelligent Radios,” suggesting a deep dive into advanced semiconductor design and communication technologies relevant to the future of 6G. The use of terms like “2.5D/3D” refers to advanced packaging technologies in integrated circuits, which are crucial for enhancing performance and integration in high-speed wireless communications, especially for 6G systems.

The speaker, Farhana Sheikh, is described as a Principal Engineer at Intel Corporation, signaling her expertise and significant experience in the field, which adds prestige to the event. Her inclusion in the “Distinguished Lecturer Program” underlines the high level of academic and professional exchange that IEEE fosters. And it conveys professionalism and invites a specialized audience interested in cutting-edge advancements in FPGA, chiplet technology, and 6G radios.

And the number of connected devices is expected to reach 500 billion by 2030, which is 59-times larger than the expected world population. Objects will become the dominant users of next-generation communications and sensing at untethered, wireline-like broadband performance, bandwidths, and throughputs. This sub-terahertz 6G communication and sensing will integrate security and intelligence. It will enable a 10x to 100x increase in peak data rates. FPGAs are well positioned to enable intelligent radios for 6G when coupled with high-performance chiplets incorporating RF circuits, data converters, and digital baseband circuits incorporating machine learning and security.  This talk presents use of 2.5D and 3D heterogeneous integration of FPGAs with chiplets, leveraging Intel’s EMIB/Foveros technologies with focus on one emerging application driver: FPGA-based 6G sub-THz intelligent wireless systems.  Nano-, micro-, and macro-3D heterogeneous integration is summarized, and previous research in 2.5D chiplet integration with FPGAs is leveraged to forge a path towards new 3D-FPGA based 6G platforms.  Challenges in antenna, packaging, power delivery, system architecture design, thermals, and integrated design methodologies/tools are briefly outlined. Opportunities to standardize die-to-die interfaces for modular integration of internal and external circuit IPs are also discussed.